View SSM2302CPZ-REEL7_2626767.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

filterless high efficiency class-d stereo audio amplifier ssm2302 rev. 0 information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2006 analog devices, inc. all rights reserved. features filterless class-d amplifier with built-in output stage 1.4 w into 8 at 5.0 v supply with less than 1% thd 85% efficiency at 5.0 v, 1.4 w into 8 speaker better than 98 db snr (signal-to-noise ratio) single-supply operation from 2.5 v to 5.0 v 20 na ultralow shutdown current short-circuit and thermal protection available in 16-lead, 3 mm 3 mm lfcsp pop-and-click suppression built-in resistors reduce board component count fixed and user-adjustable gain configurations applications mobile phones mp3 players portable gaming portable electronics educational toys general description the ssm2302 is a fully integrated, high efficiency, class-d stereo audio amplifier. it is designed to maximize performance for mobile phone applications. the application circuit requires a minimum of external components and operates from a single 2.5 v to 5.0 v supply. it is capable of delivering 1.4 w of con- tinuous output power with less than 1% thd + n driving an 8 load from a 5.0 v supply. the ssm2302 features a high efficiency, low noise modulation scheme. it operates with 85% efficiency at 1.4 w into 8 from a 5.0 v supply and has a signal-to-noise ratio (snr) that is better than 98 db. pdm modulation is used to provide lower emi- radiated emissions compared with other class-d architectures. the ssm2302 has a micropower shutdown mode with a typical shutdown current of 20 na. shutdown is enabled by applying a logic low to the sd pin. the architecture of the device allows it to achieve a very low level of pop and click. this minimizes voltage glitches at the output during turn-on and turn-off, thus reducing audible noise on activation and deactivation. the fully differential input of the ssm2302 provides excellent rejection of common-mode noise on the input. input coupling capacitors can be omitted if the dc input common-mode voltage is approximately v dd /2. the ssm2302 also has excellent rejection of power supply noise, including noise caused by gsm transmission bursts and rf rectification. psrr is typically 63 db at 217 hz. the gain can be set to 6 db or 12 db utilizing the gain control select pin connected respectively to ground or v dd . gain can also be adjusted externally by using an external resistor. the ssm2302 is specified over th e commercial temperature range (?40c to +85 c). it has built-in thermal shutdown and output short-circuit protec tion. it is available in a 16-lead, 3 mm 3 mm lead-frame chip scale package (lfcsp). functional block diagram gain control fet driver modulator 0.1f vdd vdd gnd gnd internal oscillator outr+ outr? outl+ outl? gain control bias fet driver modulator inr+ vbatt 2.5v to 5.0v inr? gain sd gain shutdown inl+ inl? 10f 0.01f 1 1 input caps are optional if input dc common-mode voltage is approximately v dd /2. 0.01f 1 0.01f 1 0.01f 1 left in+ left in? right in? right in+ ssm2302 06051-001 figure 1.
ssm2302 rev. 0 | page 2 of 20 table of contents features .............................................................................................. 1 applications....................................................................................... 1 general description ......................................................................... 1 functional block diagram .............................................................. 1 revision history ............................................................................... 2 specifications..................................................................................... 3 absolute maximum ratings............................................................ 4 thermal resistance ...................................................................... 4 esd caution.................................................................................. 4 pin configuration and function descriptions............................. 5 typical performance characteristics ............................................. 6 typical application circuits............................................................ 9 application notes ........................................................................... 12 overview...................................................................................... 12 gain selection ............................................................................. 12 pop-and-click suppression ...................................................... 12 emi noise.................................................................................... 12 layout .......................................................................................... 13 input capacitor selection.......................................................... 13 proper power supply decoupling ............................................ 13 evaluation board information...................................................... 14 introduction................................................................................ 14 operation .................................................................................... 14 ssm2302 application board schematic.................................. 15 ssm2302 stereo class-d amplifier evaluation module component list.......................................................................... 16 ssm2302 application board layout........................................ 17 outline dimensions ....................................................................... 18 ordering guide .......................................................................... 18 revision history 6/06revision 0: initial version
ssm2302 rev. 0 | page 3 of 20 specifications v dd = 5.0 v, t a = 25 o c, r l = 8 , unless otherwise noted table 1. parameter symbol conditions min typ max unit device characteristics output power p o r l = 8 , thd = 1%, f = 1 khz, 20 khz bw, v dd = 5.0 v 1.4 w r l = 8 , thd = 1%, f = 1 khz, 20 khz bw, v dd = 3.6 v 0.615 w r l = 8 , thd = 1%, f = 1 khz, 20 khz bw, v dd = 2.5 v 0.275 w r l = 8 , thd = 10%, f = 1 khz, 20 khz bw, v dd = 5.0 v 1.53 w r l = 8 , thd = 10%, f = 1 khz, 20 khz bw, v dd = 3.6 v 0.77 w r l = 8 , thd = 10%, f = 1 khz, 20 khz bw, v dd = 2.5 v 0.35 w efficiency p out =1.4 w, 8 , v dd = 5.0 v 85 % total harmonic distortion + noise thd + n p o = 1 w into 8 each channel, f = 1 khz, v dd = 5.0 v 0.1 % p o = 0.5 w into 8 each channel, f = 1 khz, v dd = 3.6 v 0.04 % input common-mode voltage range v cm 1.0 v dd ? 1 v common-mode rejection ratio cmrr gsm v cm = 2.5 v 100 mv at 217 hz 55 db channel separation x talk p o = 100 mw , f = 1 khz 98 db average switching frequency f sw 1.8 mhz differential output offset voltage v oos g = 6 db; g = 12 db 2.0 mv power supply supply voltage range v dd guaranteed from psrr test 2.5 5.0 v power supply rejection ratio psrr v dd = 2.5 v to 5.0 v, 50 hz, input floating/ground 70 85 db psrr gsm v ripple = 100 mv at 217 hz, inputs ac gnd, c in = 0.01 f, input referred 63 db supply current i sy v in = 0 v, no load, v dd = 5.0 v 8.0 ma v in = 0 v, no load, v dd = 3.6 v 6.6 ma v in = 0 v, no load, v dd = 2.5 v 5.3 ma shutdown current i sd sd = gnd 20 na gain control closed-loop gain av0 gain pin = 0 v 6 db av1 gain pin = v dd 12 db differential input impedance z in sd = vdd, 150 k sd = gnd 210 k shutdown control input voltage high v ih i sy 1 ma 1.2 v input voltage low v il i sy 300 na 0.5 v turn-on time t wu sd rising edge from gnd to v dd 30 ms turn-off time t sd sd falling edge from v dd to gnd 5 s output impedance z out sd = gnd >100 k noise performance output voltage noise e n v dd = 2.5 v to 5.0 v, f = 20 hz to 20 khz, inputs are ac grounded, sine wave, a v = 6 db, a weighting 35 v signal-to-noise ratio snr p out = 1.4 w, r l = 8 98 db
ssm2302 rev. 0 | page 4 of 20 absolute maximum ratings absolute maximum ratings apply at 25c, unless otherwise noted. table 2. parameter rating supply voltage 6 v input voltage v dd common-mode input voltage v dd storage temperature range ?65c to +150c operating temperature range ?40c to +85c junction temperature range ?65c to +165c lead temperature range (soldering, 60 sec) 300c stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. thermal resistance ja is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. table 3. thermal resistance package type ja jc unit 16-lead, 3 mm 3 mm lfcsp 44 31.5 c/w esd caution esd (electrostatic discharge) sensitive device. electros tatic charges as high as 4000 v readily accumulate on the human body and test equipment and can discharge wi thout detection. although this product features proprietary esd protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. therefore, proper esd precautions are recommended to avoid performance degradation or loss of functionality.
ssm2302 rev. 0 | page 5 of 20 pin configuration and fu nction descriptions pin 1 indicator nc = no connect 1 outl+ 2 outl? 3 sd 4 inl+ 11 outr? 12 outr+ 10 gain 9 inr+ 5 i n l ? 6 n c 7 n c 8 i n r ? 1 5 v d d 1 6 g n d 1 4 v d d 1 3 g n d top view (not to scale) ssm2302 06051-002 figure 2. ssm2302 lfcsp pin configuration table 4. pin function descriptions pin no. mnemonic description 1 outl+ inverting output for left channel. 2 outl? noninverting output for left channel. 3 sd shutdown input. active low digital input. 4 inl+ noninverting input for left channel. 5 inl? inverting input for left channel. 6 nc no connect. 7 nc no connect. 8 inr? inverting input for right channel. 9 inr+ noninverting input for right channel. 10 gain gain selection. digital input. 11 outr? noninverting output for right channel. 12 outr+ inverting output for right channel. 13 gnd ground for output amplifiers. 14 vdd power supply for output amplifiers. 15 vdd power supply for output amplifiers. 16 gnd ground for output amplifiers.
ssm2302 rev. 0 | page 6 of 20 typical performance characteristics 100 0.01 0.000001 0.0001 0.00001 10 output power (w) thd + n (%) 10 1 0.1 0.001 0.01 0.1 1 r l = 8 ? , 33h gain = 12db v dd = 2.5v v dd = 3.6v v dd = 5v 06051-003 figure 3. thd + n vs. output power into 8 , a v = 12 db 100 0.01 0.0000001 0.000001 0.0001 0.00001 10 output power (w) thd + n (%) 10 1 0.1 0.001 0.01 0.1 1 r l = 8 ? , 33h gain = 6db v dd = 2.5v v dd = 3.6v v dd = 5v 06051-004 figure 4. thd + n vs. output power into 8 , a v = 6 db 100 0.0001 10 100k frequency (hz) thd + n (%) v dd = 5v r l = 8 ? , 33h 0.5w 0.25w 1w 10 1 0.1 0.01 0.001 100 1k 10k 06051-005 figure 5. thd + n vs. frequency, v dd = 5.0 v 100 0.0001 10 100k frequency (hz) thd + n (%) v dd = 3.6v r l = 8 ? , 33h 250mw 125mw 500mw 10 1 0.1 0.01 0.001 100 1k 10k 06051-006 figure 6. thd + n vs. frequency, v dd = 3.6 v 100 0.0001 10 100k frequency (hz) thd + n (%) v dd = 2.5v r l = 8 ? , 33h 125mw 75mw 250mw 10 1 0.1 0.01 0.001 100 1k 10k 06051-007 figure 7. thd + n vs. frequency, v dd = 2.5 v 9 0 2.5 5.5 supply voltage (v) supply current (ma) 8 7 6 5 4 3 2 1 3.0 3.5 4.0 4.5 5.0 06051-008 figure 8. supply current vs. supply voltage, no load
ssm2302 rev. 0 | page 7 of 20 shutdown voltage (v) shutdown current (a) 12 0 00 . 8 10 8 6 4 2 1.0 0 00 . 8 output power (w) power dissipation (w) v dd = 3.6v r l = 8 ? , 33h 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0.1 0.2 0.3 0.4 0.5 0.6 0.7 v dd = 5v v dd = 2.5v v dd = 3.6v 0.1 0.2 0.3 0.4 0.5 0.6 0.7 06051-009 06051-012 figure 9. supply current vs. shutdown voltage 1.6 0 2.5 5.0 supply voltage (v) output power (w) 10% 1% 1.4 1.2 1.0 0.8 0.6 0.4 0.2 3.0 3.5 4.0 4.5 f = 1khz gain = 2 r l = 8 ? , 33h 06051-010 figure 10. maximum output power vs. supply voltage 100 0 01 . 4 output power (w) efficiency (%) r l = 8 ? , 33h 90 80 70 60 50 40 30 20 10 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 v dd = 2.5v v dd = 3.6v v dd = 5v 06051-011 figure 11. efficiency vs. output power into 8 figure 12. power dissipation vs. output power at v dd = 3.6 v 1.8 0 01 output power (w) power dissipation (w) . 3 v dd = 5v r l = 8 ? , 33h 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 06051-013 figure 13. power dissipation vs. output power at v dd = 5.0 v 400 0 01 . 6 output power (w) supply current (ma) r l = 8 ? , 33h v dd = 3.6v v dd = 2.5v v dd = 5v 350 300 250 200 150 100 50 0.2 0.4 0.6 0.8 1.0 1.2 1.4 06051-014 figure 14. output power vs. supply current, one channel
ssm2302 rev. 0 | page 8 of 20 7 ?2 ?10 90 time (ms) voltage 6 5 4 3 2 1 0 ?1 ?5 0 5 10 15 20 25 30 35 40 45 50 55 60 65 70 75 80 85 sd input output 06051-018 0 ?100 10 100k frequency (hz) psrr (db) ?10 ?20 ?30 ?40 ?50 ?60 ?70 ?80 ?90 100 1k 10k 06051-015 figure 15. power supply reje ction ratio vs. frequency figure 18. turn-on response 0 ?80 10 100k frequency (hz) cmrr (db) 100 1k 10k ?10 ?20 ?30 ?40 ?50 ?60 ?70 06051-016 r l = 8 ? , 33h gain = 6db 7 ?2 ?20 180 time (ms) voltage 6 5 4 3 2 1 0 ?1 0 20 40 60 80 100 120 140 160 sd input output 06051-019 figure 16. common-mode reje ction ratio vs. frequency figure 19. turn-off response 0 ?140 10 100k frequency (hz) crosstalk (db) 100 1k 10k ?20 ?40 ?60 ?80 ?100 ?120 v dd = 3.6v v ripple = 1v rms r l = 8 ? , 33h 06051-017 figure 17. crosstalk vs. frequency
ssm2302 rev. 0 | page 9 of 20 typical application circuits gain control fet driver modulator vdd vdd gnd gnd v dd internal oscillator outr+ outr? outl+ outl? gain control bias fet driver modulator inr+ inr? gain sd gain shutdown inl+ inl? 0.01f 1 1 input caps are optional if input dc common-mode voltage is approximately v dd /2. 0.01f 1 0.01f 1 0.01f 1 left in+ left in? right in? right in+ ssm2302 06051-030 0.1f vbatt 2.5v to 5.0v 10f figure 20. stereo differential input configuration, gain = 12 db gain control fet driver modulator vdd vdd gnd gnd internal oscillator outr+ outr? outl+ outl? gain control bias fet driver modulator inr+ inr? sd shutdown inl+ inl? 0.01f 0.01f 0.01f 0.01f left in right in ssm2302 0 6051-031 gain gain 0.1f vbatt 2.5v to 5.0v 10f figure 21. stereo single-ended in put configuration, gain = 6 db
ssm2302 rev. 0 | page 10 of 20 gain control fet driver modulator vdd vdd gnd gnd v dd internal oscillator pop/click suppression outr+ outr? outl+ outl? gain control bias fet driver modulator inr+ inr? gain sd gain shutdown inl+ inl? 0.01f 1 1 input caps are optional if input dc common-mode voltage is approximately v dd /2. 0.01f 1 0.01f 1 r r 0.01f 1 left in+ left in? right in? right in+ ssm2302 06051-036 r r external gain settings = 20 log[4/(1 + r/150k ? )] 0.1f vbatt 2.5v to 5.0v 10f figure 22. stereo differential input configuration, user-adjustable gain gain control fet driver modulator vdd vdd gnd gnd internal oscillator outr+ outr? outl+ outl? gain control bias fet driver modulator inr+ 1 input caps are optional if input dc common-mode voltage is approximately v dd /2. external gain settings = 20 log[4/(1 + r/150k ? )] inr? gain sd shutdown inl+ inl? 0.01f 1 0.01f 1 0.01f 1 0.01f 1 left in right in pop/click suppression r r r r ssm2302 06051-037 v dd gain 0.1f vbatt 2.5v to 5.0v 10f figure 23. stereo single-ended input configuration, user-adjustable gain
ssm2302 rev. 0 | page 11 of 20 gain control fet driver modulator vdd vdd gnd gnd internal oscillator pop/click suppression outr+ outr? outl+ outl? gain control bias fet driver modulator inr+ inr? gain sd shutdown inl+ inl? 0.01f 1 1 input caps are optional if input dc common-mode voltage is approximately v dd /2. 0.01f 1 0.01f 1 r r 0.01f 1 left in+ left in? right in? right in+ ssm2302 06051-038 gain r r external gain settings = 20 log[2/(1 + r/150k ? )] 0.1f vbatt 2.5v to 5.0v 10f figure 24. stereo differential input configuration, user-adjustable gain gain control fet driver modulator vdd vdd gnd gnd internal oscillator outr+ outr? outl+ outl? gain control bias fet driver modulator inr+ 1 input caps are optional if input dc common-mode voltage is approximately v dd /2. external gain settings = 20 log[2/(1 + r/150k ? )] inr? sd shutdown inl+ inl? 0.01f 1 0.01f 1 0.01f 1 0.01f 1 left in right in pop/click suppression r r r r ssm2302 06051-039 gain gain 0.1f vbatt 2.5v to 5.0v 10f figure 25. stereo single-ended input configuration, user-adjustable gain
ssm2302 rev. 0 | page 12 of 20 application notes overview the ssm2302 stereo class-d audio amplifier features a filterless modulation scheme that greatly reduces the external components count, conserving board space and thus reducing systems cost. the ssm2302 does not require an output filter, but instead relies on the inherent inductance of the speaker coil and the natural filtering of the speaker and human ear to fully recover the audio component of the square-wave output. while most class-d ampli- fiers use some variation of pulse-width modulation (pwm), the ssm2302 uses a - modulation to determine the switching pattern of the output devices. this provides a number of important benefits. - modulators do not produces a sharp peak with many harmonics in the am frequency band, as pulse-width modulators often do. - modulation provides the benefits of reducing the amplitude of spectral components at high frequencies; that is, reducing emi emission that might otherwise be radiated by speakers and long cable traces. the ssm2302 also offers protection circuits for overcurrent and temperature protection. gain selection pulling the gain pin high of the ssm2302 sets the gain of the speaker amplifier to 12 db; pulling it low sets the gain of the speaker amplifier to 6 db. it is possible to adjust the ssm2302 gain by using external resistors at the input. to set a gain lower than 12 db refer to figure 22 for differential input configuration and figure 23 for single-ended configuration. for external gain configuration from a fixed 12 db gain, please use the following formula: external gain settings = 20 log[4/(1 + r /150 k)] to set a gain lower than 6 db refer to figure 24 for differential input configuration and figure 25 for single-ended configuration. for external gain configuration from a fixed 6 db gain, use the following formula: external gain settings = 20 log[2/(1 + r /150 k)] pop-and-click suppression voltage transients at the output of audio amplifiers can occur when shutdown is activated or deactivated. voltage transients as low as 10 mv can be heard as an audio pop in the speaker. clicks and pops can also be classified as undesirable audible transients generated by the amplifier system, therefore as not coming from the system input signal. such transients can be generated when the amplifier system changes its operating mode. for example, the following can be sources of audible transients: system power-up/ power-down, mute/unmute, input source change, and sample rate change. the ssm2302 has a pop-and-click suppression architecture that reduces this output transients, resulting in noiseless activation and deactivation. emi noise the ssm2302 uses a proprietary modulation and spread- spectrum technology to minimize emi emissions from the device. figure 26 shows ssm2302 emi emission starting from 100 khz to 30 mhz. figure 27 shows ssm2302 emi emission from 30 khz to 2 ghz. these figures clearly describe the ssm2302 emi behavior as being well below the fcc regulation values, starting from 100 khz and passing beyond 1 ghz of frequency. although the overall emi noise floor is slightly higher, frequency spurs from the ssm2302 are greatly reduced. 06051-032 70 0 0.1 100 frequency (mhz) level (db(v/m)) 60 50 40 30 20 10 11 0 = horizontal = vertical = regulation value figure 26. emi emissions from ssm2302 06051-033 70 0 10 10k frequency (mhz) level (db(v/m)) 60 50 40 30 20 10 100 1k = horizontal = vertical = regulation value figure 27. emi emissions from ssm2302 the measurements for figure 26 and figure 27 were taken with a 1 khz input signal, producing 0.5 w output power into an 8 load from a 3.6 v supply. cable length was approximately 5 cm. the emi was detected using a magnetic probe touching the 2 output trace to the load.
ssm2302 rev. 0 | page 13 of 20 layout as output power continues to increase, care needs to be taken to lay out pcb traces and wires properly between the amplifier, load, and power supply. a good practice is to use short, wide pcb tracks to decrease voltage drops and minimize inductance. make track widths at least 200 mil for every inch of track length for lowest dcr, and use 1 oz or 2 oz of copper pcb traces to further reduce ir drops and inductance. a poor layout increases voltage drops, consequently affecting efficiency. use large traces for the power supply inputs and amplifier outputs to minimize losses due to parasitic trace resistance. proper grounding guidelines helps to improve audio performance, minimize crosstalk between channels, and prevent switching noise from coupling into the audio signal. to maintain high output swing and high peak output power, the pcb traces that connect the output pins to the load and supply pins should be as wide as possible to maintain the minimum trace resistances. it is also recommended to use a large-area ground plane for minimum impedances. good pcb layouts also isolate critical analog paths from sources of high interference. high frequency circuits (analog and digital) should be separated from low frequency ones. properly designed multilayer printed circuit boards can reduce emi emission and increase immunity to rf field by a factor of 10 or more compared with double-sided boards. a multilayer board allows a complete layer to be used for ground plane, whereas the ground plane side of a double- side board is often disrupted with signal crossover. if the system has separate analog and digital ground and power planes, the analog ground plane should be underneath the analog power plane, and, similarly, the digital ground plane should be underneath the digital power plane. there should be no overlap between analog and digital ground planes nor analog and digital power planes. input capacitor selection the ssm2302 will not require input coupling capacitors if the input signal is biased from 1.0 v to v dd ? 1.0 v. input capacitors are required if the input signal is not biased within this recommended input dc common-mode voltage range, if high-pass filtering is needed ( figure 20 ), or if using a single- ended source ( figure 21 ). if high-pass filtering is needed at the input, the input capacitor along with the input resistor of the ssm2302 will form a high-pass filter whose corner frequency is determined by the following equation: f c = 1/(2 r in c in ) input capacitor can have very important effects on the circuit performance. not using input capacitors degrades the output offset of the amplifier as well as the psrr performance. proper power supply decoupling to ensure high efficiency, low total harmonic distortion (thd), and high psrr, proper power supply decoupling is necessary. noise transients on the power supply lines are short-duration voltage spikes. although the actual switching frequency can range from 10 khz to 100 khz, these spikes can contain frequency components that extend into the hundreds of megahertz. the power supply input needs to be decoupled with a good quality low esl and low esr capacitorusually around 4.7 f. this capacitor bypasses low frequency noises to the ground plane. for high frequency transients noises, use a 0.1 f capacitor as close as possible to the vdd pin of the device. placing the decoupling capacitor as close as possible to the ssm2302 helps maintain efficiency performance.
ssm2302 rev. 0 | page 14 of 20 evaluation board information introduction the ssm2302 audio power amplifier is a complete low power, class-d, stereo audio amplifier capable of delivering 1.4 w/channel into 8 load. in addition to the minimal parts required for the application circuit, measurement filters are provided on the evaluation board so that conventional audio measurements can be made without additional components. this section provides an overview of analog devices ssm2302 evaluation board. it includes a brief description of the board as well as a list of the board specifications. table 5. ssm2302 evaluation board specifications parameter specification supply voltage range, v dd 2.5 v to 5.0 v power supply current rating 1.5 a continuous output power, p o (r l = 8 , f = 1 khz, 22 khz bw) 1.4 w minimum load impedance 8 operation use the following steps when operating the ssm2302 evaluation board. power and ground 1. set the power supply voltage between 2.5 v and 5.0 v. when connecting the power supply to the ssm2302 evaluation board, make sure to attach the ground connection to the gnd header pin first and then connect the positive supply to the vdd header pin. inputs and outputs 1. ensure that the audio source is set to the minimum level. 2. connect the audio source to inputs inl and inr. 3. connect the speakers to outputs outl and outr. gain control the gain select header controls the gain setting of the ssm2302. 1. select jumper to lg for 6 db gain. 2. select jumper to hg for 12 db gain. external gain settings it is possible to adjust the ssm2302 gain using external resistors at the input. to set a gain lower than 12 db refer to figure 22 and figure 23 on the product data sheet for proper circuit con- figuration. for external gain configuration from a fixed 12 db gain, use the following formula: external gain settings = 20 log[4/(1 + r /150 k)] to set a gain lower than 6 db refer to figure 24 and figure 25 on the product data sheet for proper circuit configuration. for external gain configuration from a fixed 6 db gain, use the following formula: external gain settings = 20 log[2/(1 + r /150 k)] shutdown control the shutdown select header controls the shutdown function of the ssm2302. the shutdown pin on the ssm2302 is active low, meaning that a low voltage (gnd) on this pin places the ssm2302 into shutdown mode. 1. select jumper to 1-2 position. shutdown pulled to v dd . 2. select jumper to 2-3 position. shutdown pulled to gnd. input configurations 1. for differential input configuration with input capacitors do not place a jumper on jp8, jp9, jp10, and jp11. 2. for differential input configuration without input capacitors place a jumper on jp8, jp9, jp10, and jp11.
ssm2302 rev. 0 | page 15 of 20 ssm2302 application board schematic nc nc u1 ssm2302 inr? inr+ gain outr+ outr? 4 3 2 1 inl+ sd outl+ outl? inl? 15 14 13 16 gain c4 1nf c3 1nf 1 2 2 c10 0.01f c7 0.1f c6 0.1f c5 10f c11 0.01f r3 100k ? right in rin+ rin? jp11 header 2 jp10 header 2 1 1 2 3 12 9 10 11 12 vdd vdd v dd gnd gnd 6 7 8 5 gain sd l1 ferrite bead l2 ferrite bead l1 ferrite bead out right out left l2 ferrite bead sd c2 1nf c1 1nf 1 2 v dd v dd v dd header 13c jp12 6 4 2 5 3 1 2 c8 0.01f c9 0.01f left in jp1 jp3 lin+ inl+ lin? jp9 header 2 jp8 header 2 1 1 2 3 12 jp2 power 12 r4 100k ? 06051-034 figure 28. ssm2302 application board schematic
ssm2302 rev. 0 | page 16 of 20 ssm2302 stereo class-d amplifier eval uation module component list table 6. reference description footprint quantity manufacturer/part number c8, c9, c10, c11 capacitors, 0.01 f 0402 4 murata manufacturing co., ltd./grm15 c6, c7 capacitor, 0.1 f 0603 2 murata manufacturing co., ltd./grm18 c5 capacitor, 10 f 0805 1 murata manufacturing co., ltd./grm21 c1, c2, c3, c4 capacitor, 1 nf 0402 4 murata manufacturing co., ltd./grm15 r3, r4 resistor, 100 k 0603 2 vishay/crcw06031003f l1, l2, l3, l4 ferrite bead 0402 4 murata manufacturing co., ltd./blm15eg121 u1 ic, ssm2302 3.0 mm 3.0 mm 1 ssm2302cspz eval board pcb evaluation board 1
ssm2302 rev. 0 | page 17 of 20 ssm2302 application board layout 06051-035 figure 29. ssm2302 application board layout
ssm2302 rev. 0 | page 18 of 20 outline dimensions 1 0.50 bsc 0.60 max p i n 1 i n d i c a t o r 1.50 ref 0.50 0.40 0.30 0.25 min 0.45 2.75 bsc sq top view 12 max 0.80 max 0.65 typ seating plane pin 1 indicato r 0.90 0.85 0.80 0.30 0.23 0.18 0.05 max 0.02 nom 0.20 ref 3.00 bsc sq * 1.65 1.50 sq 1.35 16 5 13 8 9 12 4 exposed pad (bottom view) * compliant to jedec standards mo-220-veed-2 except for exposed pad dimension. figure 30. 16-lead lead frame chip scale package [lfcsp_vq] 3 mm 3 mm body, very thin quad (cp-16-3) dimensions shown in millimeters ordering guide model temperature range package description package option branding ssm2302cpz-r2 1 ?40c to +85c 16-lead lead frame chip scale package [lfcsp_vq] cp-16-3 a15 ssm2302cpz-reel 1 ?40c to +85c 16-lead lead frame chip scale package [lfcsp_vq] cp-16-3 a15 SSM2302CPZ-REEL7 1 ?40c to +85c 16-lead lead frame chip scale package [lfcsp_vq] cp-16-3 a15 1 z = pb-free part.
ssm2302 rev. 0 | page 19 of 20 notes
ssm2302 rev. 0 | page 20 of 20 notes ?2006 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. d06051-0-6/06(0)

▲Up To Search▲

Price & Availability of SSM2302CPZ-REEL7

	To Download SSM2302CPZ-REEL7 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .